"29.2 A transmitter and receiver for 100Gb/s coherent networks with ..."

Jun Cao et al. (2017)

> Home

Details and statistics

DOI: 10.1109/ISSCC.2017.7870472

access: closed

type: Conference or Workshop Paper

metadata version: 2021-04-01

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/isscc/CaoCNHLCKHAZYRS17
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/isscc/CaoCNHLCKHAZYRS17
Jun Cao, Delong Cui, Ali Nazemi, Tim He, Guansheng Li, Burak Çatli, Mehdi Khanpour, Kangmin Hu, Tamer A. Ali, Heng Zhang, Hairong Yu, Ben Rhew, Shiwei Sheng, Yonghyun Shim, Bo Zhang, Afshin Momtaz:
29.2 A transmitter and receiver for 100Gb/s coherent networks with integrated 4×64GS/s 8b ADCs and DACs in 20nm CMOS. ISSCC 2017: 484-485

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.