"A TDC-less ADPLL with 200-to-3200MHz range and 3mW power dissipation for ..."

Nathaniel J. August et al. (2012)

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DOI: 10.1109/ISSCC.2012.6176995

access: closed

type: Conference or Workshop Paper

metadata version: 2023-05-24

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Nathaniel J. August, Hyung-Jin Lee, Martin Vandepas, Rachael J. Parker:
A TDC-less ADPLL with 200-to-3200MHz range and 3mW power dissipation for mobile SoC clocking in 22nm CMOS. ISSCC 2012: 246-248

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