"TBNM - Transistor-Level Boundary Model for Fast Gate-Level Noise Analysis ..."

Jindrich Zejda, Li Ding (2006)

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DOI: 10.1109/ISQED.2006.131

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

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  - https://dblp.org/rec/conf/isqed/ZejdaD06
Jindrich Zejda, Li Ding:
TBNM - Transistor-Level Boundary Model for Fast Gate-Level Noise Analysis of Macro Blocks. ISQED 2006: 147-152

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