"Block-basis on-line BIST architecture for embedded SRAM using wordline and ..."

Masahiro Yoshikawa et al. (2011)

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DOI: 10.1109/ISQED.2011.5770744

access: closed

type: Conference or Workshop Paper

metadata version: 2024-03-11

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Masahiro Yoshikawa, Shunsuke Okumura, Yohei Nakata, Yuki Kagiyama, Hiroshi Kawaguchi, Masahiko Yoshimoto:
Block-basis on-line BIST architecture for embedded SRAM using wordline and bitcell voltage optimal control. ISQED 2011: 322-325

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