"A 40-nm resilient cache memory for dynamic variation tolerance with ..."

Yohei Nakata et al. (2014)

> Home

Details and statistics

DOI: 10.1109/ISQED.2014.6783301

access: closed

type: Conference or Workshop Paper

metadata version: 2024-03-11

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/isqed/NakataKOJSTNNYFNKKY14
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/isqed/NakataKOJSTNNYFNKKY14
Yohei Nakata, Yuta Kimi, Shunsuke Okumura, Jinwook Jung, Takuya Sawada, Taku Toshikawa, Makoto Nagata, Hirofumi Nakano, Makoto Yabuuchi, Hidehiro Fujiwara, Koji Nii, Hiroyuki Kawai, Hiroshi Kawaguchi, Masahiko Yoshimoto:
A 40-nm resilient cache memory for dynamic variation tolerance with bit-enhancing memory and on-chip diagnosis structures delivering ×91 failure rate improvement. ISQED 2014: 16-23

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.