"Finite-Point Gate Model for Fast Timing and Power Analysis."

Dinesh Ganesan et al. (2008)

> Home

Details and statistics

DOI: 10.1109/ISQED.2008.4479815

access: closed

type: Conference or Workshop Paper

metadata version: 2024-08-13

- view
  authority control:
- export record
  dblp key:
  - conf/isqed/GanesanMWC08
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/isqed/GanesanMWC08
Dinesh Ganesan, Alexander V. Mitev, Janet Meiling Wang, Yu Cao:
Finite-Point Gate Model for Fast Timing and Power Analysis. ISQED 2008: 657-662

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.