"An architecture design of SAD based template matching for fast queue ..."

Trio Adiono et al. (2016)

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DOI: 10.1109/ISPACS.2016.7824708

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-02

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  - https://dblp.org/rec/conf/ispacs/AdionoAPDPS16
Trio Adiono, Mahendra Drajat Adhinata, Novi Prihatiningrum, Ricky Disastra, Rachmad Vidya Wicaksana Putra, Amy Hamidah Salman:
An architecture design of SAD based template matching for fast queue counter in FPGA. ISPACS 2016: 1-4

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