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"VLSI Implementation of Area-Efficient Parallelized Neural Network ..."
Tae Koan Yoo, Jong Kang Park, Jong Tae Kim (2019)
- Tae Koan Yoo, Jong Kang Park, Jong Tae Kim:
VLSI Implementation of Area-Efficient Parallelized Neural Network Accelerator Using Hashing Trick. ISOCC 2019: 67-68

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