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"A 10-Gb/s power and area efficient clock and data recovery circuit in ..."
Jinsoo Rhim, Kwang-Chun Choi, Woo-Young Choi (2012)
- Jinsoo Rhim, Kwang-Chun Choi, Woo-Young Choi:
A 10-Gb/s power and area efficient clock and data recovery circuit in 65-nm CMOS technology. ISOCC 2012: 104-107
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