"Design of 16-Kb 6T SRAM Supporting Wide Parallel Data Access for Enhanced ..."

Jiwon Lee et al. (2024)

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DOI: 10.1109/ISOCC62682.2024.10762141

access: closed

type: Conference or Workshop Paper

metadata version: 2024-12-19

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Jiwon Lee, Hyeonjun Cheon, Ho-Sung Lee, Ik-Hyeon Jeon, Joo-Hyung Chae:
Design of 16-Kb 6T SRAM Supporting Wide Parallel Data Access for Enhanced Computation Speed. ISOCC 2024: 167-169

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