"MVL circuit design and characterization at the transistor level using SUS-LOC."

E. Kinvi-Boh et al. (2003)

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DOI: 10.1109/ISMVL.2003.1201392

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

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E. Kinvi-Boh, M. Aline, Olivier Sentieys, Edgar "Dan" Olson:
MVL circuit design and characterization at the transistor level using SUS-LOC. ISMVL 2003: 105-110

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