default search action
"A low-power clock and data recovery circuit for 2.5 Gb/s SDH receivers."
Andrea Pallotta, Francesco Centurelli, Alessandro Trifiletti (2000)
- Andrea Pallotta, Francesco Centurelli, Alessandro Trifiletti:
A low-power clock and data recovery circuit for 2.5 Gb/s SDH receivers. ISLPED 2000: 67-72
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.