"A low-power clock and data recovery circuit for 2.5 Gb/s SDH receivers."

Andrea Pallotta, Francesco Centurelli, Alessandro Trifiletti (2000)

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DOI: 10.1145/344166.344202

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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Andrea Pallotta, Francesco Centurelli, Alessandro Trifiletti:
A low-power clock and data recovery circuit for 2.5 Gb/s SDH receivers. ISLPED 2000: 67-72

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