"Designing SRAM Using CMOS and CNTFET at 32 nm Technology."

Arushi Shrivastava et al. (2019)

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DOI: 10.1109/ISES47678.2019.00070

access: closed

type: Conference or Workshop Paper

metadata version: 2022-12-07

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Arushi Shrivastava, Parul Damahe, Vijay Rao Kumbhare, Manoj Kumar Majumder:
Designing SRAM Using CMOS and CNTFET at 32 nm Technology. iSES 2019: 284-287

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