"Design of Area Optimised, Energy Efficient Quaternary Circuits Using CNTFETs."

Poojan Patel et al. (2019)

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DOI: 10.1109/ISES47678.2019.00069

access: closed

type: Conference or Workshop Paper

metadata version: 2023-09-30

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Poojan Patel, Nikita Doddapaneni, Sharvani Gadgil, Chetan Vudadha:
Design of Area Optimised, Energy Efficient Quaternary Circuits Using CNTFETs. iSES 2019: 280-283

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