"A 40nm Low Power High Stable SRAM Cell Using Separate Read Port and Sleep ..."

Jitendra Kumar Mishra et al. (2018)

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DOI: 10.1109/ISES.2018.00011

access: closed

type: Conference or Workshop Paper

metadata version: 2020-03-31

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Jitendra Kumar Mishra, Harshit Srivastava, Prasanna Kumar Misra, Manish Goswami:
A 40nm Low Power High Stable SRAM Cell Using Separate Read Port and Sleep Transistor Methodology. iSES 2018: 1-5

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