default search action
"Trace-Driven Simulation and Design Space Exploration of Network-on-Chip ..."
G. S. Sangeetha et al. (2018)
- G. S. Sangeetha, Vignesh Radhakrishnan, Prabhu B. M. Prasad, Khyamling Parane, Basavaraj Talawar:
Trace-Driven Simulation and Design Space Exploration of Network-on-Chip Topologies on FPGA. ISED 2018: 129-134
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.