"Exploring Integrated Circuit Verification Methodology for Verification and ..."

Manish M. Patil, Shaila Subbaraman, Shirish Joshi (2011)

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DOI: 10.1109/ISED.2011.47

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Manish M. Patil, Shaila Subbaraman, Shirish Joshi:
Exploring Integrated Circuit Verification Methodology for Verification and Validation of PLC Systems. ISED 2011: 88-93

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