"Real-time FPGA rectification implementation combined with stereo camera."

Junwon Mun, Jaeseok Kim (2015)

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DOI: 10.1109/ISCE.2015.7177765

access: closed

type: Conference or Workshop Paper

metadata version: 2019-12-05

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Junwon Mun, Jaeseok Kim:
Real-time FPGA rectification implementation combined with stereo camera. ISCE 2015: 1-2

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