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"A half rate CDR with DCD cleaning up and quadrature clock calibration for ..."

Xiaobao Yu et al. (2013)

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DOI: 10.1109/ISCAS.2013.6572008

access: closed

type: Conference or Workshop Paper

metadata version: 2021-07-23

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Xiaobao Yu, Baoyong Chi, Meng Wei, Albert Z. Wang, Tianling Ren, Zhihua Wang:
A half rate CDR with DCD cleaning up and quadrature clock calibration for 20Gbps 60GHz communication in 65nm CMOS. ISCAS 2013: 962-965

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