"A 14-bit 6GS/s DAC Achieving >65dBc SFDR with Bilateral Output ..."

Xipeng Xing et al. (2024)

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DOI: 10.1109/ISCAS58744.2024.10557879

access: closed

type: Conference or Workshop Paper

metadata version: 2024-07-16

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Xipeng Xing, Qiji Huang, Tinghua Chen, Haigang Feng, Zhongfeng Wang:
A 14-bit 6GS/s DAC Achieving >65dBc SFDR with Bilateral Output Impedance Compensation in 22nm CMOS. ISCAS 2024: 1-5

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