"A 1.8 V 10-bit 80 MS/s low power track-and-hold circuit in a 0.18µm ..."

Erik Säll (2003)

> Home

Details and statistics

DOI: 10.1109/ISCAS.2003.1205498

access: closed

type: Conference or Workshop Paper

metadata version: 2023-10-21

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/iscas/Sall03
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/iscas/Sall03
Erik Säll:
A 1.8 V 10-bit 80 MS/s low power track-and-hold circuit in a 0.18µm CMOS process. ISCAS (1) 2003: 53-56

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.