"Design of a Low Jitter Multi-Phase Realigned PLL in submicronic CMOS ..."

Régis Roubadia, Sami Ajram, Guy Cathébras (2007)

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DOI: 10.1109/ISCAS.2007.378744

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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Régis Roubadia, Sami Ajram, Guy Cathébras:
Design of a Low Jitter Multi-Phase Realigned PLL in submicronic CMOS technology. ISCAS 2007: 2490-2493

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