"Dynamic Memory and Sequential Logic Design using Negative Capacitance FinFETs."

Ramin Rajaei et al. (2020)

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DOI: 10.1109/ISCAS45731.2020.9180676

access: closed

type: Conference or Workshop Paper

metadata version: 2021-01-21

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Ramin Rajaei, Yen-Kai Lin, Sayeef S. Salahuddin, Michael T. Niemier, Xiaobo Sharon Hu:
Dynamic Memory and Sequential Logic Design using Negative Capacitance FinFETs. ISCAS 2020: 1-5

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