"Pin-Efficient 12-Bit 8-Wire 8-Level Permutation Coding for High-Speed ..."

Ailing Piao, Aili Wang, Chuanjin Richard Shi (2018)

> Home

Details and statistics

DOI: 10.1109/ISCAS.2018.8351386

access: closed

type: Conference or Workshop Paper

metadata version: 2024-01-12

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/iscas/PiaoWS18
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/iscas/PiaoWS18
Ailing Piao, Aili Wang, Chuanjin Richard Shi:
Pin-Efficient 12-Bit 8-Wire 8-Level Permutation Coding for High-Speed Parallel Wireline Tranceivers. ISCAS 2018: 1-4

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.