"Efficient Highly-Parallel Decoder Architecture for Quasi-Cyclic ..."

Daesun Oh, Keshab K. Parhi (2007)

> Home

Details and statistics

DOI: 10.1109/ISCAS.2007.378276

access: closed

type: Conference or Workshop Paper

metadata version: 2024-05-07

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/iscas/OhP07
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/iscas/OhP07
Daesun Oh, Keshab K. Parhi:
Efficient Highly-Parallel Decoder Architecture for Quasi-Cyclic Low-Density Parity-Check Codes. ISCAS 2007: 1855-1858

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.