"High throughput VLSI architecture for HEVC SAO encoding for ultra HDTV."

Mihir N. Mody et al. (2014)

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DOI: 10.1109/ISCAS.2014.6865710

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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Mihir N. Mody, Hrushikesh Garud, Soyeb Nagori, Dipan Kumar Mandal:
High throughput VLSI architecture for HEVC SAO encoding for ultra HDTV. ISCAS 2014: 2620-2623

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