"Design guidelines for the high-speed dynamic partial reconfiguration based ..."

Ahmed Kamaleldin et al. (2017)

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DOI: 10.1109/ISCAS.2017.8050456

access: closed

type: Conference or Workshop Paper

metadata version: 2019-09-16

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  - https://dblp.org/rec/conf/iscas/KamaleldinSNGSI17
Ahmed Kamaleldin, Ahmed M. Soliman, Ahmed Nagy, Youssef Gamal, Ahmed Shalash, Yehea Ismail, Hassan Mostafa:
Design guidelines for the high-speed dynamic partial reconfiguration based software defined radio implementations on Xilinx Zynq FPGA. ISCAS 2017: 1-4

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