"FPGA implementation of FIR filter using M-bit parallel distributed arithmetic."

Shiann Shiun Jeng, Hsing-Chen Lin, Shu-Ming Chang (2006)

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DOI: 10.1109/ISCAS.2006.1692725

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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Shiann Shiun Jeng, Hsing-Chen Lin, Shu-Ming Chang:
FPGA implementation of FIR filter using M-bit parallel distributed arithmetic. ISCAS 2006

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