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"VLSI design of dual-mode Viterbi/turbo decoder for 3GPP."
Kai Huang et al. (2004)
- Kai Huang, Fan-Min Li, Pei-Ling Shen, An-Yeu Wu:
VLSI design of dual-mode Viterbi/turbo decoder for 3GPP. ISCAS (2) 2004: 773-776

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