"A novel FPGA architectural implementation of pipelined thinning algorithm."

Pei-Yung Hsiao, Chun-Ho Hua, Chien-Chen Lin (2004)

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DOI: —

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type: Conference or Workshop Paper

metadata version: 2016-05-20

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Pei-Yung Hsiao, Chun-Ho Hua, Chien-Chen Lin:
A novel FPGA architectural implementation of pipelined thinning algorithm. ISCAS (2) 2004: 593-596

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