"An area-efficient analog VLSI architecture for state-parallel Viterbi ..."

Kai He, Gert Cauwenberghs (1999)

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DOI: 10.1109/ISCAS.1999.780756

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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Kai He, Gert Cauwenberghs:
An area-efficient analog VLSI architecture for state-parallel Viterbi decoding. ISCAS (2) 1999: 432-435

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