"An 11-Bit 500 MS/s Two-Step SAR ADC with Non-Attenuated Passive Residue ..."

Wenbin He, Fan Ye, Junyan Ren (2021)

> Home

Details and statistics

DOI: 10.1109/ISCAS51556.2021.9401056

access: closed

type: Conference or Workshop Paper

metadata version: 2021-07-02

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/iscas/He0R21
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/iscas/He0R21
Wenbin He, Fan Ye, Junyan Ren:
An 11-Bit 500 MS/s Two-Step SAR ADC with Non-Attenuated Passive Residue Transfer. ISCAS 2021: 1-4

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.