"A Fractional-N PLL for Digital Clock Generation With an FIR-Embedded ..."

Baoyong Chi et al. (2007)

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DOI: 10.1109/ISCAS.2007.378052

access: closed

type: Conference or Workshop Paper

metadata version: 2022-04-09

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Baoyong Chi, Xueyi Yu, Woogeun Rhee, Zhihua Wang:
A Fractional-N PLL for Digital Clock Generation With an FIR-Embedded Frequency Divider. ISCAS 2007: 3051-3054

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