"A 12-bit 30MS/s SAR ADC with VCO-Based Comparator and ..."

Sheng Chang et al. (2019)

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DOI: 10.1109/ISCAS.2019.8702448

access: closed

type: Conference or Workshop Paper

metadata version: 2020-09-07

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Sheng Chang, Xiong Zhou, Zhaoming Ding, Qiang Li:
A 12-bit 30MS/s SAR ADC with VCO-Based Comparator and Split-and-Recombination Redundancy for Bypass Logic. ISCAS 2019: 1-5

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