"FPGA-based 3D median filtering using word-parallel systolic arrays."

Carlos R. Castro-Pareja et al. (2004)

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DOI: 10.1109/ISCAS.2004.1328707

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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Carlos R. Castro-Pareja, Jogikal M. Jagadeesh, Sharmila Venugopal, Raj Shekhar:
FPGA-based 3D median filtering using word-parallel systolic arrays. ISCAS (3) 2004: 157-160

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