"A 1-V CMOS output stage with high linearity."

Walter Aloisi, Gianluca Giustolisi, Gaetano Palumbo (2003)

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DOI: 10.1109/ISCAS.2003.1205541

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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Walter Aloisi, Gianluca Giustolisi, Gaetano Palumbo:
A 1-V CMOS output stage with high linearity. ISCAS (1) 2003: 225-228

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