"An energy-efficient and scalable eDRAM-based register file architecture ..."

Naifeng Jing et al. (2013)

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DOI: 10.1145/2485922.2485952

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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  dblp key:
  - conf/isca/JingSLGMGCL13
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  - https://dblp.org/rec/conf/isca/JingSLGMGCL13
Naifeng Jing, Yao Shen, Yao Lu, Shrikanth Ganapathy, Zhigang Mao, Minyi Guo, Ramon Canal, Xiaoyao Liang:
An energy-efficient and scalable eDRAM-based register file architecture for GPGPU. ISCA 2013: 344-355

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