"Error elimination ECC by horizontal error detection and vertical-LDPC ECC ..."

Shun Suzuki et al. (2018)

> Home

Details and statistics

DOI: 10.1109/IRPS.2018.8353680

access: closed

type: Conference or Workshop Paper

metadata version: 2019-09-25

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/irps/SuzukiDNMT18
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/irps/SuzukiDNMT18
Shun Suzuki, Yoshiaki Deguchi, Toshiki Nakamura, Kyoji Mizoguchi, Ken Takeuchi:
Error elimination ECC by horizontal error detection and vertical-LDPC ECC to increase data-retention time by 230% and acceptable bit-error rate by 90% for 3D-NAND flash SSDs. IRPS 2018: 7-1

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.