"Optimal design of dummy ball array in wafer level package to improve board ..."

Seongwon Jeong et al. (2018)

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DOI: 10.1109/IRPS.2018.8353653

access: closed

type: Conference or Workshop Paper

metadata version: 2019-01-28

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Seongwon Jeong, Jinseok Kim, Ayoung Kim, Byungwook Kim, Moonsoo Lee, Jaewon Chang, In Hak Baick, Hanbyul Kang, Younggeun Ji, Sangchul Shin, Sangwoo Pae:
Optimal design of dummy ball array in wafer level package to improve board level thermal cycle reliability (BLR). IRPS 2018: 3

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