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"Methodology for Decoupled Simulation of SystemVerilog HDL Designs."
Juan-José Crespo et al. (2019)
- Juan-José Crespo, German Maglione Mathey, José L. Sánchez, Francisco J. Alfaro-Cortes, Jesús Escudero-Sahuquillo, Pedro Javier García, Francisco J. Quiles:
Methodology for Decoupled Simulation of SystemVerilog HDL Designs. HPCS 2019: 741-746
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