"FPGA prototype of 14 bit, 20msamples/S, 85 Mw successive approximation ADC ..."

Rajendra D. Kanphade et al. (2011)

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DOI: 10.1145/1980022.1980202

access: closed

type: Conference or Workshop Paper

metadata version: 2021-05-10

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Rajendra D. Kanphade, S. B. Patil, A. M. Patokar, D. D. Nawgaje:
FPGA prototype of 14 bit, 20msamples/S, 85 Mw successive approximation ADC suitable for RF applications. ICWET 2011: 832-836

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