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"A 100-Gb/s PAM-4 CTLE in 28-nm CMOS with Coarse-Fine Gain Adjustment."
Renjie Tang et al. (2020)
- Renjie Tang, Kanan Wang, Dan Li, Li Geng, Xiaoyan Gui:
A 100-Gb/s PAM-4 CTLE in 28-nm CMOS with Coarse-Fine Gain Adjustment. ICTA 2020: 92-93
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