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"Modeling of 10-bits, 40 MHz, low power pipelined ADC utilizing novel ..."
Jiri Haze et al. (2006)
- Jiri Haze, Lukas Fujcik, Ondrej Sajdl, Radimir Vrba:
Modeling of 10-bits, 40 MHz, low power pipelined ADC utilizing novel background calibration. ICN/ICONS/MCL 2006: 180
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