"An FPGA based DPLL with fuzzy logic controllable loop filters."

Mohieddin Moradi, Mehdi Ehsanian (2017)

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DOI: 10.1109/ICM.2017.8268812

access: closed

type: Conference or Workshop Paper

metadata version: 2020-03-21

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Mohieddin Moradi, Mehdi Ehsanian:
An FPGA based DPLL with fuzzy logic controllable loop filters. ICM 2017: 1-4

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