"Design and VLSI implementation of a Low Probability of Error Viterbi Decoder."

C. Arun, V. Rajamani (2008)

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DOI: 10.1109/ICETET.2008.180

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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C. Arun, V. Rajamani:
Design and VLSI implementation of a Low Probability of Error Viterbi Decoder. ICETET 2008: 418-423

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