"A New Methodology of Integrating High Level Synthesis and Floorplan for ..."

Yunfeng Wang et al. (2005)

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DOI: 10.1007/11599555_28

access: closed

type: Conference or Workshop Paper

metadata version: 2018-02-01

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Yunfeng Wang, Jinian Bian, Xianlong Hong, Liu Yang, Qiang Zhou, Qiang Wu:
A New Methodology of Integrating High Level Synthesis and Floorplan for SoC Design. ICESS 2005: 275-286

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