"A Low-cost VLSI Design of Extended Linear Interpolation for Real Time ..."

Chung-Chi Lin et al. (2008)

> Home

Details and statistics

DOI: 10.1109/ICESS.2008.85

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

- view
  authority control:
- export record
  dblp key:
  - conf/icess/LinSCWTC08
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/icess/LinSCWTC08
Chung-Chi Lin, Ming-Hwa Sheu, Huann-Keng Chiang, Zeng-Chuan Wu, Jia-Yi Tu, Chia-Hung Chen:
A Low-cost VLSI Design of Extended Linear Interpolation for Real Time Digital Image Processing. ICESS 2008: 196-202

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.