"CMOS/STT-MRAM Based Ascon LWC: a Power Efficient Hardware Implementation."

Nathan Roussel et al. (2022)

> Home

Details and statistics

DOI: 10.1109/ICECS202256217.2022.9971037

access: closed

type: Conference or Workshop Paper

metadata version: 2024-05-07

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/icecsys/RousselPPDR22
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/icecsys/RousselPPDR22
Nathan Roussel, Olivier Potin, Gregory di Pendina, Jean-Max Dutertre, Jean-Baptiste Rigaud:
CMOS/STT-MRAM Based Ascon LWC: a Power Efficient Hardware Implementation. ICECS 2022 2022: 1-4

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.