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"Stand-by low-power architecture in a 3 V-only 2-bit/cell 64-Mbit flash memory."

Rino Micheloni et al. (2001)

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DOI: 10.1109/ICECS.2001.957625

access: closed

type: Conference or Workshop Paper

metadata version: 2021-01-18

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  dblp key:
  - conf/icecsys/MicheloniMKT01
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  - https://dblp.org/rec/conf/icecsys/MicheloniMKT01
Rino Micheloni, Ilaria Motta, Osama Khouri, Guido Torelli:
Stand-by low-power architecture in a 3 V-only 2-bit/cell 64-Mbit flash memory. ICECS 2001: 929-932

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