"A multi-bit error tolerant register file for a high reliable embedded ..."

Siamak Esmaeeli et al. (2011)

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DOI: 10.1109/ICECS.2011.6122330

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-23

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  - conf/icecsys/EsmaeeliHVR11
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  - https://dblp.org/rec/conf/icecsys/EsmaeeliHVR11
Siamak Esmaeeli, Morteza Hosseini, Bijan Vosoughi Vahdat, Bizhan Rashidian:
A multi-bit error tolerant register file for a high reliable embedded processor. ICECS 2011: 532-537

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